ROBOTS FOR ROBOCUP 2005



INTRODUCTION

These robots were designed for the RoboCup 2005 - F180 Small Size soccer robot competition. The idea behind the participation was to develop a multifunctional, flexible and cost effective embedded system that can be used in all kinds of robot controls.We came up with compact small size robots having exceptional strategic and navigational skills and with electro-mechanical innovations that allowed us cooperative control using artificial intelligence, in the dynamic environment of robot soccer

Twelve robots (6 in each team) play soccer on a field 4m X 5.5m. An overhead camera captures a movie of the event. Each frame of this movie is acquired by a host PC via the USB port . These raw bit map images are then vectorised by image processing software and sent to the game strategy software. This software uses Artificial Intelligence techniques to produce move instructions which are then transmitted via an RF link to each robot, thus completing the last link in a closed loop control system

Electrical System

INTRODUCTION

The electronic circuitry provides wide functionality with minimum size, cost and component count. The use of an SOPC implemented on an FPGA, along with motor driver ICs and a communication module, housed on a single circuit board with a diameter less than 180mm, made this system robust, multifunctional and completely flexible. This system can be used in applications where four motors are used with re-configurable I/Os to control Remotely Operated Vehicles (ROV). The two layer PCB gives free access to connectors, power switch and on board battery charging. A keyboard and LCD display unit, housed on top of the main system board,is provided for user interface while debugging the embedded software and stand-alone use. A dual use serial port allows communication with a host computer either via an RF or wired link.

Fig 1: Basic Blocks of System

The electronics feature an FPGA as the main Processing Element. It contains a 32-Bit Floating Point CPU and peripheral cores that perform all the mathematical, control and communication operations (fig 2). The FPGA is configured with compiled VHDL code either via a JTAG cable or at power-on by the onboard PROMs. PWM motor control signals from the FPGA feed motor driver ICs containing a H-bridge transistor circuit, for 4 quadrant control. Bi-directional shaft encoders generate speed feedback signals which are fed into FPGA for closed loop PID control. Data from the host is received by the RF module and fed to the FPGA by UART transievers. The robot is powered by a 14V Ni-Cd battery pack which feeds switching and linear regulators generating 5V, 3.3V, 2.5V and 12V.

Embedded software

Once configured, the processor initializes all on board systems and then waits for data from the host. This data consists of a preamble, distance value and a control word. The control word indicates the kind of motion (rotation or translation, forward or reverse, cw or ccw) and whether the kicker is on or off. The distance value is used as a set point for the outer distance control loop which generates a speed setpoint for the inner speed control loop. The output of the speed controller is a 16 bit count value fed to the PWM controller that generates the o/p signal for the motor drivers. Feedback from the shaft encoders is fed to a PI filter and sent to the speed control loop, it is also integrated and used as feedback by the distance control loop. The kicker uses only one bit that is either ON or OFF.

Fig 2: Block Diagram of Electrical System

Fig 3: Block Diagram of Motor Driver Chip

The FPGA

The FPGA used here (ACEX 1K100 QC 208-3) is a 100,000 gate count device from ALTERA Inc. It is used with a 20 MHz oscillator. Its internal circuit was designed in VHDL and simulated in MAXPLUS+2 using its multichip simulation feature.Due to the compact design of the internal circuit, only 40% of the chip was utilized. The FPGA can be configured with the compiled VHDL code via the JTAG cable or onboard PROMs. The SOPC design incorporating all digital functions on a single chip resulted in a highly compact and sturdy design. The entire design was synchronized with a single global clock resulting in highly reliable performance over a wide range of oscillator frequencies and operating temperatures. It resulted in a low component count and power consumption, smaller and simpler PCB design and fewer connectors. Synchronization problems associated propagation delays of descrete devices were eliminated. Noise problems due to excessive connections, difficult supply and ground routing, coupling of switching signals to adjacent tracks and PCB layers were eliminated. It made debugging simpler, drastically shortened the design cycle and reduced cost.

Fig 4: Inernal Block Diagram of FPGA

IP CORES

Fig 5: Inernal Block Diagram of uC

IP CORES

SIGNALS

PC SOFTWARE

Image Acquisition and Processing

The primary sensor is an overhead camera. Robot and ball images are captured by the global vision system and are sent to the PC via a USB port in a form of stream.

This information is given to the video RAM from where the IMAGE-processing module performs layer conversion from the RGGB Bayer format to the standard RGB co-ordinate system. Absolute slicing of the image is performed, followed by image enhancement by filtering (Median and/or Low pass). The Entity Detection routine then detects the robot and ball positions on the field.

Game Strategy

The software uses Artificial Intelligence and emphasises a team-based control strategy. This includes defense, offence, ball passing and kicking. It determines the robot displacements, without collision with obstacles. The optimum path is determined and stored in a binary format.It is then transmitted to all the robots through a wireless link. At the core of Game Strategy is ROV Guidance.

ROV Guidance

This is done by first generating a grid of all possible path segments and then, using Recursive Tree and Maximum Likelihood algorithms, connecting these to form the optimum path (shown in magenta).

Fig 6: Path Grid

Recursive Tree and Maximum Likelihood Algorithms

Each branch or path segment on this tree starts at the source robot and ends at the destination point.The apical bud of each path segments branches out, towards the destination, into one or more child branches. Each child branch, in turn branches out in exactly the same way as its parent did. This leads us to think of a software routine that calls itself, in other words a recursive routine. The decision to branch out in the direction of the destination and not away from it is taken by the Maximum Likelihood Algorithm.

Fig 7: Recursive Tree Algorithms

OBSTACLE AVOIDANCE

Is accomplished by avoiding path segments that intersect entities (green line in fig 6) and those which will cause a robot to move outside the field. An exclusion zone around the field and entities is made for this purpose.

COMPONENTS OF ROBOT DESIGN

• Design in VHDL of the VLSI components described above.
  
• Design in ASSEMBLY of PID Controller, LCD display controller, PI Filters, Integrators, RF communication software and their use in designing the embedded Robot Control Software.
  
• Design in VISUAL ‘C’, LINUX of Image Acquisition, Image processing and communication software
  
• Design in AUTOCAD of Robot mechanicals.
  
• Design in ORCAD of robot PCB schematics
  
• PCB design aspects such as noise, ground rails, supply rails, transmission line effects, capacitive & inductive coupling and shielding
  
• DC Motor characteristics
  
• Design in VISUAL ‘C’ of Game strategy software
  
• Design in VISUAL ‘C’ of ROV Guidance software
  
• Design of RF Electronics