An important feature in most embedded systems is the ability to acquire analog signals from the external world. Such signals require an A to D converter, for conversion to digital, in order to be read by a processor.
The A_DCC.VHD IP core, described here, is a parallel A to D interface controller and can be implemented as a descrete device in an FPGA/CPLD or ASIC.
This core provides all the necessary interface logic for a variety of parallel converters. An internal FIFO buffer, maximizes throughput. Automatic conversion keeps the internal FIFO buffer filled at all times, freeing embedded software of conversion control tasks. TRI-STATE outputs permit implementation as a discrete device on an external data bus. Flexible bus width permits interface with a variety of processors. Can be cascaded with other peripherals or used stand-alone. Any number of analog inputs, multiplexers and digital resolution allow for its use in large or small control applications. Flexible analog MUX settling time, eliminates cross-talk between channels. Bit filtering of the converter STATUS line ensures reliable operation. Interfaces with the processor on a single I/O read port. Synchronous design using a single global clock, ensures reliable operation over a range of clock frequencies and temperature.
FEATURES
Double buffered interface logic allows configuration to any bus width, from serial to parallel of any width.
Interface on data bus or port, dedicated or shared.
Instantiate the core as stand-alone or cascaded, in a daisy chain configuration.
Daisy chain multiple cores on one port address.
Any number of Analog inputs.
Any number of Analog Multiplexers.
Any number of Bits of resolution
Interrupt to CPU on FIFO full.
Rising and falling edge debouncing of converter STATUS line with configurable debounce interval
TRI-STATE outputs for implementation as a descrete device ASIC or PLD.
Interface with CPU on a single I/O read port.
Flexible MUX settling time, eliminates cross-talk between channels.
Automatic conversion and channel # rollover keep conversions continuously on without user intervention.
Any depth FIFO buffer
Any clock frequency
APPLICATION
Acquisition of analog data, from sensors such as-pH, pressure, temperature, gas, voltage, current, flow rate etc.
Used in a variety of industrial and commercial control applications such as :- Motor (AC/DC), Power (AC/DC), Robotics, Data-Loggers, Osciloscopes, Spectrum and logic analysers, DVMs, Power Meters, etc.
